1. Field of the Invention
This invention relates to a phase-locked loop (PLL), and more particularly, to a phase-locked loop with memory storing control data.
2. Description of the Related Art
The phase-locked loop is a closed-loop electronic servomechanism, the output of which locks onto and tracks a reference signal. It also is a communications circuit in which a local oscillator is synchronized in phase and frequency with a received signal.
In the prior art, as shown in FIG. 14, there is known a voltage-controlled oscillator (VCO) 3 (varying the dc voltage varies the frequency of the oscillator), a frequency divider 4 (the output frequency is an integral submultiple of the input frequency), a phase-sensitive detector (PD) 1 (the output is a dc voltage proportional to the phase difference between its two inputs), and a low-pass filter (LPF) 2. It is connected in a loop arrangement so that any phase (frequency) difference between the two inputs of the phase-sensitive detector is minimized. Thus, the VCO output fvco is locked to an integral multiple of the frequency of the reference signal.
Japanese Laid-Open Patent Publication No. 30518/1991, discloses a phase-locked-loop oscillator comprising a voltage-controlled oscillator (VCO), a frequency divider, a phase-sensitive detector, a low-pass filter, an A/D converter and a D/A converter connected in a loop arrangement. The output of the low-pass filter controls the VCO after it is converted into digital equivalents by the A/D converter and again converted into analog equivalents by the D/A converter. If the reference input to the phase-sensitive detector is interrupted, it is sensed by an input signal interruption detector halting the converting operation of the A/D and D/A converters and maintaining the converted digital signal unchanged. Thus, the control signal for the VCO is kept unchanged, maintaining the output frequency constant. However, the phase-locked loop should be controlled even during interruption of the input signal, thus resulting in power consumption. The locking-up time for VCO frequency to lock finally to the frequency of the reference signal also becomes longer when the ambient air temperature changes.
Japanese Laid-Open Patent Publication No. 49422/1991, discloses an oscillator comprising a voltage-controlled oscillator, a temperature sensor, an A/D converter converting the sensor output into a digital equivalent, an EEPROM addressed by the A/D converter output to read out a temperature compensating data and a D/A converter converting the data to analog equivalents for controlling the voltage-controlled oscillator, thus the frequency of the oscillator output is kept constant regardless of variations in the ambient air temperature. When tile temperature compensating data is to be written into EEPROM, the voltage-controlled oscillator, a phase-sensitive detector and a low-pass filter are connected in a loop arrangement. Another A/D converter also converts the low-pass filter output into digital equivalents to be written in the EEPROM as the temperature compensating data. However, the VCO output frequency will not be kept constant when the supply voltage is changed. Besides, alternation of the reference frequency is not easy and the circuit configuration is complicated.